manuais Freescale Semiconductor DSP56366

Freescale semiconductor DSP56366 Manual do Utilizador (366 páginas)

Marca: Freescale-semiconductor | Categoria: Recetor | Tamanho: 3.54 MB |

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Índice

Processor

1

Contents

3

TOC-2 Freescale Semiconductor

4

Freescale Semiconductor TOC-3

5

TOC-4 Freescale Semiconductor

6

Freescale Semiconductor TOC-5

7

TOC-6 Freescale Semiconductor

8

Freescale Semiconductor TOC-7

9

TOC-8 Freescale Semiconductor

10

Freescale Semiconductor TOC-9

11

List of Figures

15

LOF-2 Freescale Semiconductor

16

Freescale Semiconductor LOF-3

17

LOF-4 Freescale Semiconductor

18

List of Tables

19

LOT-2 Freescale Semiconductor

20

Freescale Semiconductor i

21

Manual Conventions

22

; ~SS0 as PC3 for GPIO line 3

23

1 DSP56366 Overview

25

1.2 DSP56300 Core Description

26

Freescale Semiconductor 1-3

27

1.4.1 Data ALU

28

Freescale Semiconductor 1-5

29

1.4.4 Internal Buses

30

1.4.8 On-Chip Memory

31

1.5 Peripheral Overview

32

1.5.1 Host Interface (HDI08)

33

1.5.3 Triple Timer (TEC)

33

Peripheral Overview

34

1-10 Freescale Semiconductor

34

2.1 Signal Groupings

35

DSP56366

36

2.2 Power

37

2.3 Ground

37

2.4 Clock and PLL

38

2.5.1 External Address Bus

39

2.5.2 External Data Bus

39

2.5.3 External Bus Control

39

Table 2-9 Host Interface

43

2.8 Serial Host Interface

46

2.12 Timer

56

2.13 JTAG/OnCE Interface

56

3 Memory Configuration

57

Data and Program Memory Maps

59

Freescale Semiconductor 3-3

59

3-4 Freescale Semiconductor

60

Freescale Semiconductor 3-5

61

3-6 Freescale Semiconductor

62

Freescale Semiconductor 3-7

63

3-8 Freescale Semiconductor

64

Freescale Semiconductor 3-9

65

3-10 Freescale Semiconductor

66

3.1.1 Reserved Memory Spaces

67

3.1.3 Bootstrap ROM

67

3.2 Internal I/O Memory Map

68

4 Core Configuration

75

Operating Mode Register (OMR)

76

4-2 Freescale Semiconductor

76

M_PAE equ 23 ; Patch Enable

77

4.3 Operating Modes

78

Interrupt Priority Registers

81

Freescale Semiconductor 4-7

81

4.5 DMA Request Sources

86

4.6 PLL Initialization

87

4-18 Freescale Semiconductor

92

5.1 Introduction

93

5.2 Programming Model

93

Programming Model

94

5-2 Freescale Semiconductor

94

6 Host Interface (HDI08)

95

6.2.2 Interface - Host Side

96

6.3 HDI08 Host Port Signals

97

6.4 HDI08 Block Diagram

98

6-6 Freescale Semiconductor

100

Table 6-4 HDI08 IRQ

102

Freescale Semiconductor 6-13

107

Figure 6-7 Single strobe bus

108

Freescale Semiconductor 6-15

109

6-18 Freescale Semiconductor

112

Table 6-11 HDRQ

115

6.6.3.6 ISR Reserved Bits 5-6

119

6.7.2 Polling

122

6.7.3 Servicing Interrupts

123

Servicing The Host Interface

124

6-30 Freescale Semiconductor

124

7 Serial Host Interface

125

7.3 SHI Clock Generator

126

I/O Shift Register (IOSR)

127

7-4 Freescale Semiconductor

128

7-6 Freescale Semiconductor

130

7.4.4.2 HSAR I

131

7-8 Freescale Semiconductor

132

Freescale Semiconductor 7-9

133

Table 7-4 SHI Data Size

135

Freescale Semiconductor 7-13

137

Freescale Semiconductor 7-15

139

7.6 Characteristics Of The I

140

7.6.1 Overview

141

C Data Transfer Formats

142

7.7.1 SPI Slave Mode

143

7.7.2 SPI Master Mode

144

C Slave Mode

145

7.7.3.2 Transmit Data In I

146

C Master Mode

147

7.7.4.1 Receive Data in I

148

7.7.4.2 Transmit Data In I

148

Freescale Semiconductor 7-25

149

7-26 Freescale Semiconductor

150

8.1 Introduction

151

Introduction

152

8-2 Freescale Semiconductor

152

ESAI Data and Control Pins

153

Freescale Semiconductor 8-3

153

8-4 Freescale Semiconductor

154

8.3 ESAI Programming Model

157

Figure 8-2 TCCR Register

158

ESAI Programming Model

159

Freescale Semiconductor 8-9

159

8-10 Freescale Semiconductor

160

8-12 Freescale Semiconductor

162

Figure 8-5 TCR Register

163

8-14 Freescale Semiconductor

164

Freescale Semiconductor 8-15

165

Normal Mode

167

Network Mode

167

Figure 8-14

168

8-20 Freescale Semiconductor

170

Freescale Semiconductor 8-21

171

Figure 8-8 RCCR Register

172

Freescale Semiconductor 8-23

173

Figure 8-9 RCR Register

176

Freescale Semiconductor 8-27

177

Freescale Semiconductor 8-31

181

Figure 8-10 SAICR Register

182

Freescale Semiconductor 8-33

183

8-34 Freescale Semiconductor

184

Figure 8-12 SAISR Register

185

8-36 Freescale Semiconductor

186

Freescale Semiconductor 8-37

187

(a) Receive Registers

188

(b) Transmit Registers

188

8-40 Freescale Semiconductor

190

Figure 8-15 TSMA Register

191

Figure 8-16 TSMB Register

191

Figure 8-17 RSMA Register

192

Figure 8-18 RSMB Register

192

8.4 Operating Modes

193

8.4.3 ESAI Interrupt Requests

194

Operating Modes

195

Freescale Semiconductor 8-45

195

8.4.5 Serial I/O Flags

196

8.5 GPIO - Pins and Registers

197

Figure 8-19 PCRC Register

198

Figure 8-20 PRRC Register

198

Figure 8-21 PDRC Register

199

ESAI Initialization Examples

200

8-50 Freescale Semiconductor

200

9.1 Introduction

201

Clock / Frame Sync

202

Generators

202

Control Logic

202

ESAI_1 Data and Control Pins

203

Freescale Semiconductor 9-3

203

9.3 ESAI_1 Programming Model

204

Figure 9-2 EMUXR Register

205

Figure 9-3 TCCR_1 Register

206

TPSR TPM0 - TPM7

207

TFP0 - TFP3

207

Figure 9-6 TCR_1 Register

208

Figure 9-7 RCCR_1 Register

209

Figure 9-8 RCR_1 Register

210

Figure 9-9 SAICR_1 Register

210

Figure 9-10 SAISR_1 Register

211

Figure 9-11 TSMA_1 Register

212

Figure 9-12 TSMB_1 Register

212

9.4 Operating Modes

213

9.5 GPIO - Pins and Registers

213

Figure 9-15 PCRE Register

214

Figure 9-16 PRRE Register

214

Figure 9-17 PDRE Register

215

GPIO - Pins and Registers

216

9-16 Freescale Semiconductor

216

10 Digital Audio Transmitter

217

10.2 DAX Signals

218

10.3 DAX Functional Overview

218

10.4 DAX Programming Model

219

DAX Internal Architecture

221

Freescale Semiconductor 10-5

221

10-6 Freescale Semiconductor

222

10-8 Freescale Semiconductor

224

10.5.9 DAX Biphase Encoder

225

10.5.11 DAX Clock Multiplexer

225

10.5.12 DAX State Machine

226

10.6.4 DAX operation with DMA

227

$FFFFFF; offset=-1

227

10-12 Freescale Semiconductor

228

11 Timer/ Event Counter

231

11-2 Freescale Semiconductor

232

Freescale Semiconductor 11-3

233

76543210

234

11.3.1 Prescaler Counter

235

11.3.2.3 TPLR Reserved Bit 23

236

Freescale Semiconductor 11-7

237

11-10 Freescale Semiconductor

240

Freescale Semiconductor 11-11

241

11.4 Timer Modes of Operation

242

11.4.1 Timer Modes

243

11.4.1.2 Timer Pulse (Mode 1)

244

11.4.2.1 Measurement Accuracy

246

11.4.4 Watchdog Modes

249

11.4.5 Reserved Modes

250

11.4.6 Special Cases

250

11.4.7 DMA Trigger

251

Timer Modes of Operation

252

11-22 Freescale Semiconductor

252

Freescale Semiconductor A-1

253

DSP56366 Bootstrap Program

254

A-2 Freescale Semiconductor

254

Freescale Semiconductor A-3

255

A-4 Freescale Semiconductor

256

Freescale Semiconductor A-5

257

A-6 Freescale Semiconductor

258

Freescale Semiconductor A-7

259

A-8 Freescale Semiconductor

260

Freescale Semiconductor A-9

261

A-10 Freescale Semiconductor

262

Freescale Semiconductor A-11

263

A-12 Freescale Semiconductor

264

Freescale Semiconductor A-13

265

A-14 Freescale Semiconductor

266

Appendix B Equates

267

B-2 Freescale Semiconductor

268

Freescale Semiconductor B-3

269

B-4 Freescale Semiconductor

270

Freescale Semiconductor B-5

271

B-6 Freescale Semiconductor

272

Freescale Semiconductor B-7

273

B-8 Freescale Semiconductor

274

Freescale Semiconductor B-9

275

B-10 Freescale Semiconductor

276

Freescale Semiconductor B-11

277

B-12 Freescale Semiconductor

278

Freescale Semiconductor B-13

279

B-14 Freescale Semiconductor

280

Freescale Semiconductor B-15

281

B-16 Freescale Semiconductor

282

Freescale Semiconductor B-17

283

B-18 Freescale Semiconductor

284

Freescale Semiconductor B-19

285

B-20 Freescale Semiconductor

286

Freescale Semiconductor B-21

287

B-22 Freescale Semiconductor

288

Freescale Semiconductor B-23

289

B-24 Freescale Semiconductor

290

Freescale Semiconductor B-25

291

B-26 Freescale Semiconductor

292

Freescale Semiconductor B-27

293

B-28 Freescale Semiconductor

294

Freescale Semiconductor B-29

295

B-30 Freescale Semiconductor

296

Freescale Semiconductor B-31

297

B-32 Freescale Semiconductor

298

Freescale Semiconductor B-33

299

B-34 Freescale Semiconductor

300

Appendix C JTAG BSDL

301

JTAG BSDL

302

C-2 Freescale Semiconductor

302

Freescale Semiconductor C-3

303

C-4 Freescale Semiconductor

304

Freescale Semiconductor C-5

305

C-6 Freescale Semiconductor

306

Freescale Semiconductor C-7

307

C-8 Freescale Semiconductor

308

D.1 Introduction

309

D.2 Internal I/O Memory Map

309

D-12 Freescale Semiconductor

320

Freescale Semiconductor D-13

321

D-14 Freescale Semiconductor

322

D.6 Programming Sheets

323

Central Processor

324

CENTRAL PROCESSOR

326

IRQC Mode

326

IRQD Mode

326

= Reserved, Program as 0

327

MF7 MF5 MF4 MF3 MF2 MF1 MF0

328

HOST (HDI08)

329

DSP Side

329

HCP HRDFHF1 HTDEHF0

330

HCIE HRIEHF3 HTIEHF2

330

HDM1HDM2

330

Host Chip Select Polarity

331

0 = HCS Active Low

331

HTRQ & HRRQ Enable

331

1 = HCS Active High

331

Processor Side

333

= Reserved, write as 0

335

Application:

336

Programmer:

336

Sheet 2 of 3

336

Programming Sheets

337

Freescale Semiconductor D-29

337

X: $FFFFB5 Reset: $000000

339

X: $FFFFB8 Reset: $000000

340

X: $FFFFB7 Reset: $000000

341

X: $FFFFB4 Reset: $000000

342

SAISR - ESAI Status Register

343

X: $FFFFB3 Reset $000000

343

Y: $FFFFAF Reset: $000000

344

Y: $FFFF95 Reset: $000000

346

Y: $FFFF98 Reset: $000000

347

Y: $FFFF97 Reset: $000000

348

Y: $FFFF94 Reset: $000000

349

Y: $FFFF93 Reset $000000

350

XCB XUB XVB XCA XUA XVA

351

D-44 Freescale Semiconductor

352

00 Internal CLK/2

353

10 Reserved

353

11 Reserved

353

1514131211109876543210

356

Port B (HDI08)

356

D-52 Freescale Semiconductor

360

Numerics

361

OMR register 6

363

Freescale Semiconductor dispositivos