Freescale Semiconductor EETX4K Manual do Utilizador descarregar pdf (Página 27)

Block Guide — S12EETX4KV0 V00.04

Figure 4-1 Determination Procedure for PRDIV8 and EDIV Bits

PRDIV8=1

yes

PRDIV8=0 (reset)

12.8MHz?

EECLK=(PRDCLK)/(1+EDIV[5:0])

PRDCLK=oscillator_clock

PRDCLK=oscillator_clock/8

PRDCLK[MHz]*(5+Tbus[µs])

EDIV[5:0]=PRDCLK[MHz]*(5+Tbus[µs])-1

yes

START

Tbus < 1µs?

an integer?

EDIV[5:0]=INT(PRDCLK[MHz]*(5+Tbus[µs]))

1/EECLK[MHz] + Tbus[µs] > 5

AND

EECLK

> 0.15MHz

END

yes

EDIV[5:0] > 4?

ALL COMMANDS IMPOSSIBLE

yes

ALL COMMANDS IMPOSSIBLE

TRY TO DECREASE Tbus

yes

oscillator_clock

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cale Semiconductor,

Freescale Semiconductor, Inc.

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Freescale Semiconductor EETX4K Manual do Utilizador Página 27