Freescale-semiconductor ColdFire MCF52210 Manual do Utilizador descarregar pdf (Página 361)

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MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2

Freescale Semiconductor 22-1

Chapter 22

DMA Timers (DTIM0–DTIM3)

22.1 Introduction

This chapter describes the configuration and operation of the four direct memory access (DMA) timer

modules (DTIM0, DTIM1, DTIM2, and DTIM3). These 32-bit timers provide input capture and reference

compare capabilities with optional signaling of events using interrupts or DMA triggers. Additionally,

programming examples are included.

NOTE

The designation n appears throughout this section to refer to registers or

signals associated with one of the four identical timer modules: DTIM0,

DTIM1, DTIM2, or DTIM3.

22.1.1 Overview

Each DMA timer module has a separate register set for configuration and control. The timers can be

configured to operate from the internal bus clock or from an external clocking source using the DTINn

signal. If the internal bus clock is selected, it can be divided by 16 or 1. The selected clock source is routed

to an 8-bit programmable prescaler that clocks the actual DMA timer counter register (DTCNn). Using the

DTMRn, DTXMRn, DTCRn, and DTRRn registers, the DMA timer may be configured to assert an output

signal, generate an interrupt, or initiate a DMA transfer on a particular event.

NOTE

The GPIO module must be configured to enable the peripheral function of

the appropriate pins (refer to Chapter 13, “General Purpose I/O Module”)

prior to configuring the DMA Timers.

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