
Configuration
56F8322 Technical Data, Rev. 10.0
Freescale Semiconductor 97
Preliminary
Table 8-3 GPIO External Signals Map
Pins in shaded rows are not available in 56F8322 / 56F8122
Pins in italics are NOT available in the 56F8122 device
GPIO Function Peripheral Function
Package Pin Notes
GPIOA0 PWMA0 3 PWM is NOT available in 56F8122
GPIOA1 PWMA1 4 PWM is NOT available in 56F8122
GPIOA2 PWMA2 / SSI
6 SIM register SIM_GPS is used to select between SPI1 and
PWMA on a pin-by-pin basis
PWM is NOT available in 56F8122
GPIOA3 PWMA3 / MISO1 7 SIM register SIM_GPS is used to select between SPI1 and
PWMA on a pin-by-pin basis
PWM is NOT available in 56F8122
GPIOA4 PWMA4 / MOSI1 8 SIM register SIM_GPS is used to select between SPI1 and
PWMA on a pin-by-pin basis
PWM is NOT available in 56F8122
GPIOA5 PWMA5 / SCLK1 9 SIM register SIM_GPS is used to select between SPI1 and
PWMA on a pin-by-pin basis
PWM is NOT available in 56F8122
GPIOA6 FAULTA0 12
GPIOA7 FAULTA1
GPIOA8 FAULTA2
GPIOA9 ISA0
GPIOA10 ISA1
GPIOA11 ISA2
GPIOB0 SS0 / TXD1 15 SIM register SIM_GPS is used to select between SPI1 and
PWMA on a pin-by-pin basis
GPIOB1 MISO0 / RXD1 16 SIM register SIM_GPS is used to select between SPI1 and
PWMA on a pin-by-pin basis
GPIOB2 MOSI0 18
GPIOB3 SCLK0 19
GPIOB4 HOME0 / TA3 35 Quad Decoder 0 register DECCR is used to select
between Decoder 0 and Timer A
Quad Dec is NOT available in 56F8122
GPIOB5 INDEX0 / TA2 36 Quad Decoder 0 register DECCR is used to select
between Decoder 0 and Timer A
Quad Dec is NOT available in 56F8122
GPIOB6 PHASEB0 / TA1 37 Quad Decoder 0 register DECCR is used to select
between Decoder 0 and Timer A
Quad Dec is NOT available in 56F8122
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