
Memory Interface
SC140 DSP Core Reference Manual 2-67
Table 2-28 shows the representation of the stack support instructions in big and little endian modes. In the
examples shown in this table, it is assumed that the stack access is to address A0. The stack instructions
treat the register data like a 32-bit long word move.
Table 2-29 shows the representation of the bit mask instructions in big and little endian modes.
Table 2-28. Stack Support Instructions in Big and Little Endian Modes
Instruction Register Operands Big Endian
Little
Endian
Single
POP
POPN
PUSH
PUSHN
A0 = A
A1 = B
A2 = C
A3 = D
A0 = D
A1 = C
A2 = B
A3 = A
Double
POP
POPN
PUSH
PUSHN
A0 = A
A1 = B
A2 = C
A3 = D
A4 = E
A5 = F
A6 = G
A7 = H
A0 = D
A1 = C
A2 = B
A3 = A
A4 = H
A5 = G
A6 = F
A7 = E
Table 2-29. Bit Mask Instructions in Big and Little Endian Modes
Instruction Register Operands Big Endian
Little
Endian
BMCHG.W
BMCLR.W
BMSET.W
BMTSTS.W
BMTSTC.W
BMTSET.W
NOT.W
AND.W
OR.W
EOR.W
A0 = A
A1 = B
A0 = B
A1 = A
031
A
BCD
Example: PUSH D0
D0 =
031
A
B
C
D
E
F
GH
Example: PUSH D0 PUSH D1
D0 =
D1 =
015
A
B
Example: BMSET.W #$1234, (A0)
Data =
Mask = 12 34
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